Publications 2007

Journal Articles

2007

I. Amer; W. Badawy; G. Jullien; M. Mattavelli; R. Turney : A Simplified 8 × 8 Transformation And Quantization Real-Time Ip-Block For MPEG-4 H.264/AVC Applications: A New Design Flow Approach; Journal of Circuits, Systems, and Computers . 2007. DOI : 10.1142/S021812660700399X.

Conference Papers

2007

R. Zhou; M. Mattavelli : A new time-frequency representation for music signal analysis: Resonator Time-Frequency Image. 2007. 9th International Symposium on Signal Processing and its Applications, Sharjah, U ARAB EMIRATES, Feb 12-15, 2007. p. 1278-1281.
J. Thomas-Kerr; J. Janneck; M. Mattavelli; I. Burnett; C. Ritz : Reconfigurable Media Coding: Self-Describing Multimedia Bitstreams. 2007. SIPS 2007, Shanghai, Oct. 17-19 2007.
R. Mosqueron; J. Dubois; M. Mattavelli : High Performance Embedded Co-Processor Architecture For CMOS Imaging Systems. 2007. Workshop on Design and Architectures for Signal and Image Processing, Grenoble (France), November 2007.
C. Lucarz; M. Mattavelli; J. Dubois : A HW/SW codesign platform for Algorithm-Architecture mapping. 2007. Workshop on Design and Architectures for Signal and Image Processing (DASIP), Grenoble, France, November 27-29.
C. Lucarz; M. Mattavelli : A platform for mixed HW/SW algorithm specifications for the exploration of SW and HW partitioning. 2007. PATMOS, Göteborg, Sweden, September 3-5, 2007. p. 485-494.
C. Lucarz; M. Mattavelli; J. Thomas-Kerr; J. Janneck : Reconfigurable media coding: a new specification model for multimedia coders. 2007. SiPS, Shanghai, China, October 17-19, 2007.

Theses

2007

S. Aguirre / D. Mlynek; M. Mattavelli (Dir.) : Deep-submicron embedded processor architectures for high-performance, low-cost and low-power. Lausanne, EPFL, 2007. DOI : 10.5075/epfl-thesis-3742.
C. Clerc / M. Mattavelli (Dir.) : A profiling framework for high level design space exploration for memory and system architectures. Lausanne, EPFL, 2007. DOI : 10.5075/epfl-thesis-3706.

Working Papers

2007

C. Lucarz; J. Thomas-Kerr; M. Mattavelli; J. Janneck; D. Parlour et al. : [ISO/IEC MPEG contribution] Implement flexible FUs according to the processing mechanism in CVC WD using CAL (Results of Core Experiment 1.1) and analysis of the compactness of RVC Abstract Decoder Model (Results of Core Experiment 1.3). 2007.
D. Ding; M. Mattavelli; C. Lucarz; L. Yu : [ISO/IEC MPEG contribution] Classification of Tokens for FUs of MPEG-4 SP and MPEG-4/AVC in RVC Framework. 2007.
C. Lucarz; J. Thomas-Kerr; M. Mattavelli : [ISO/IEC MPEG contribution] A systematic procedure for the generation of a CAL parser from BDSL in the RVC framework - result CE 1.1. 2007.
C. Lucarz; M. Mattavelli; D. Parlour : [ISO/IEC MPEG contribution] Serialized version of some MPEG-4 SP FUs. 2007.
C. Lucarz; J. Thomas-Kerr; M. Mattavelli : [ISO/IEC MPEG contribution] Reconfigurability potential of the MPEG-4 SP decoder (results of CE 1.1). 2007.
C. Lucarz; M. Mattavelli : [ISO/IEC MPEG contribution] Implementation of multiple reference frame support in RVC CAL model. 2007.
C. Lucarz; M. Mattavelli : [ISO/IEC MPEG contribution] Compression of the RVC DDL Decoder Description with BiM (results of Core Experiment 1.3 in RVC). 2007.
C. Lucarz; M. Mattavelli; A. Kinane; S. Lee; S. Lee : [ISO/IEC MPEG contribution] RVC Functional Units naming process proposal. 2007.
M. Mattavelli; C. Lucarz; A. Kinane; K. Radha; J. Janneck et al. : [ISO/IEC MPEG contribution] Update of the Textual specification of Functional Units, DDL and FUs SW of the MPEG-4 SP RVC Abstract Decoder Model (Results of CE 2.1). 2007.
C. Lucarz; M. Mattavelli; A. Kinane; R. Krisha : [ISO/IEC MPEG contribution] A proposal for the classification and mapping of MPEG video coding technology into Functional Units for the RVC framework (Results of CE 2.2). 2007.