Publications 2013

A. A. H. B. Ab Rahman / M. Mattavelli (Dir.) : Optimizing Dataflow Programs for Hardware Synthesis. Lausanne, EPFL, 2014. DOI : 10.5075/epfl-thesis-6059.
C. Alberti; D. Renzi; C. Timmerer; C. Mueller; S. Lederer et al. : Automated Qoe Evaluation Of Dynamic Adaptive Streaming Over Http. 2013. 5th International Workshop on Quality of Multimedia Experience (QoMEX). p. 58-63.
S. C. Brunet; E. Bezati; C. Alberti; M. Mattavelli; E. Amaldi et al. : Partitioning And Optimization Of High Level Stream Applications For Multi Clock Domain Architectures. 2013. IEEE Workshop on Signal Processing Systems (SiPS). p. 177-182.
S. Casale-Brunet; A. Elguindy; E. Bezati; R. Thavot; G. Roquier et al. : Methods to explore design space for MPEG RMC codec specifications; Signal Processing-Image Communication. 2013. DOI : 10.1016/j.image.2013.08.012.
E. S. Jang; M. Mattavelli; M. Preda; M. Raulet; H. Sun : Reconfigurable media coding: An overview; Signal Processing-Image Communication. 2013. DOI : 10.1016/j.image.2013.08.008.
J. Ersfolk; G. Roquier; J. Lilius; M. Mattavelli : Modeling Control Tokens for Composition of CAL Actors. 2013. Conference on Design and Architectures for Signal and Image Processing (DASIP), Cagliari, Italy, October 8-10, 2013.
J. Ersfolk; G. Roquier; W. Lund; M. Mattavelli; J. Lilius : STATIC AND QUASI-STATIC COMPOSITIONS OF STREAM PROCESSING APPLICATIONS FROM DYNAMIC DATAFLOW PROGRAMS. 2013. IEEE International Conference on Acoustics, Speech and Signal Processing, Vancouver, Canada, May 26-31, 2013. p. 2620–2624.
S. Casale Brunet; C. Alberti; M. Mattavelli; J. Janneck : Systems Design Space Exploration by Serial Dataflow Program Executions. 2013. Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, CA, USA, 3-6 November, 2013.
S. Casale Brunet; E. Bezati; C. Alberti; M. Mattavelli; E. Amaldi et al. : Multi-clock domain optimization for reconfigurable architectures in high-level dataflow applications. 2013. Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, CA, USA, 3-6 November, 2013.
S. Casale Brunet; E. Bezati; C. Alberti; M. Mattavelli; E. Amaldi et al. : Partitioning and Optimization of high level Stream applications for Multi Clock Domain Architectures. 2013. Signal Processing Systems (SiPS), Taipei, Taiwan, 16-18 October, 2013.
A. Rahman; A. A. H. Bin; S. Casale Brunet; C. Alberti; M. Mattavelli : Dataflow Program Analysis and Refactoring Techniques for Design Space Exploration: MPEG-4 AVC/H.264 Decoder Implementation Case Study. 2013. Design & Architectures for Signal & Image Processing (DASIP), Cagliari, Italy, October 8-10, 2013.
D. S. Jorre; D. Jack; C. Alberti; M. Mattavelli; S. Casale Brunet : Porting an MPEG-HEVC decoder to a low-power many-core platform. 2013. Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, California, USA, November 3-6th, 2013.
E. Bezati; M. Mattavelli; J. Janneck : High-Level Synthesis of Dataflow Programs for Signal Processing Systems. 2013. 8th International Symposium on Image and Signal Processing and Analysis (ISPA 2013), Trieste, Italy, 4-6, September 2013.
M. Grafl; C. Timmerer; H. Hellwagner; G. Xilouris; G. Gardikis et al. : Scalable Media Coding Enabling Content-Aware Networking; IEEE Multimedia. 2013. DOI : 10.1109/MMUL.2012.57.
M. Canale; S. Casale Brunet : A Lego Mindstorms NXT Experiment for Model Predictive Control Education. 2013. European Control Conference, Zurich, Switzerland, 2013.
S. Casale Brunet; E. Bezati; G. Roquier; C. Alberti; M. Mattavelli et al. : Design Space Exploration and Implementation of RVC-CAL Applications using the TURNUS framework. 2013. Conference on Design & Architectures for Signal & Image Processing, Cagliari, Italy, 8-10 October 2013.
S. Casale Brunet; M. Mattavelli; J. W. Janneck : TURNUS: A design exploration framework for dataflow system design. 2013. 2013 IEEE International Symposium on Circuits and Systems (ISCAS), Beijing, China, 19-23 05 2013. p. 654-654. DOI : 10.1109/ISCAS.2013.6571927.
E. Bezati; S. Casale Brunet; M. Mattavelli; J. Janneck : Synthesis and optimization of high-level stream programs. 2013. lectronic System Level Synthesis Conference (ESLsyn), Austin, Texas, USA, May 31 2013-June 1 2013.
S. Casale Brunet; M. Mattavelli; J. W. Janneck : Buffer optimization based on critical path analysis of a dataflow program design. 2013. 2013 IEEE International Symposium on Circuits and Systems (ISCAS), Beijing, China, 19-23 05 2013. p. 1384-1387. DOI : 10.1109/ISCAS.2013.6572113.
E. Bezati; G. Roquier; M. Mattavelli : Live demonstration: High level software and hardware synthesis of dataflow programs. 2013. 2013 IEEE International Symposium on Circuits and Systems (ISCAS),, Beijing, China, 19-23 May 2013. DOI : 10.1109/ISCAS.2013.6571930.
J. J. Ahmad; S. Li; R. Thavot; M. Mattavelli : Secure Computing with the MPEG RVC Framework; Signal Processing-Image Communication. 2013. DOI : 10.1016/j.image.2013.08.015.
J. J. Ahmad; S. Li; M. Mattavelli : Performance Benchmarking of RVC based Multimedia Specifications. 2013. 20th IEEE International Conference on Image Processing (ICIP), Melbourne, Australia, September 15-18, 2013.
S. Casale Brunet; M. Mattavelli; C. Alberti; J. W. Janneck : TURNUS: a unified dataflow design space exploration framework for heterogeneous parallel systems. 2013. Conference on Design & Architectures for Signal & Image Processing, Cagliari, Italy, 8-10 October 2013.
S. Casale Brunet; M. Mattavelli; C. Alberti; J. W. Janneck : Design Space Exploration of High Level Stream Programs on Parallel Architectures: A focus on the Buffer Size Minimization and Optimization Problem. 2013. 8th International Symposium on Image and Signal Processing and Analysis, Trieste, Italy, 4-6 September 2013.
S. Casale Brunet; M. Mattavelli; C. Alberti; J. W. Janneck : Representing Guard Dependencies in Dataflow Execution Traces. 2013. 2013 Fifth International Conference on Computational Intelligence, Communication Systems and Networks (CICSyN), Madrid, Spain, 5-7 06 2013. p. 291-295. DOI : 10.1109/CICSYN.2013.26.
C. Alberti; D. Renzi; C. Timmerer; C. Mueller; S. Lederer et al. : Automated QoE Evaluation of Dynamic Adaptive Streaming over HTTP. 2013. Fifth International Workshop on Quality of Multimedia Experience (QoMEX), Klagenfurt, Austria, July 3-5, 2013.
J. T. Randriamalazarivo / D. Mlynek (Dir.) : HAWK: an open error-control and cryptographic V-VLIW processor for digital communication techniques and storage. Lausanne, EPFL, 1999. DOI : 10.5075/epfl-thesis-2013.